Universal Gates and Combined Logic Circuits: NAND, NOR, XOR

Hello students, welcome to Kwickprep. What if a factory could make only one type of gate? Could it still build every circuit in a computer? Yes, if that gate is NAND or NOR. Today we learn universal gates, XOR and XNOR, and solve combined circuit problems.

Before new gates, let us revise the three basic gates. An AND gate gives one only when all its inputs are one. An OR gate gives one when at least one input is one. A NOT gate flips its input, so zero becomes one and one becomes zero.

NAND means NOT AND: an AND gate followed by a NOT gate. Row one: A AND B is zero, so NAND gives one. Row two: AND is zero, so NAND is one. Row three: AND is zero, so NAND is one. Row four: AND is one, so NAND is zero. So NAND gives zero only when all inputs are one. Its symbol is the AND shape with a small circle at the output.

NOR means NOT OR: an OR gate followed by a NOT gate. Row one: A OR B is zero, so NOR gives one. Row two: OR is one, so NOR is zero. Row three: OR is one, so NOR is zero. Row four: OR is one, so NOR is zero. So NOR gives one only when all inputs are zero. Its symbol is the OR shape with a small circle at the output.

Here is why NAND and NOR are called universal gates. A universal gate is one that can be used to build AND, OR and NOT. We already know that AND, OR and NOT together can build any digital circuit. So a chip made only of NAND gates can build any circuit. The same is true for NOR gates. Factories prefer this, because one gate type is cheaper and simpler to make.

Now let us build the basic gates from NAND. For NOT, join both inputs of a NAND gate together and feed A into them. When A is zero, zero AND zero is zero, and NOT gives one. When A is one, one AND one is one, and NOT gives zero. That is exactly a NOT gate.

Next, AND and OR from NAND. For AND, first take A NAND B, then flip it with a second NAND wired as a NOT. NOT of NOT AND is just AND, so this uses two NAND gates. For OR, first make NOT A and NOT B using two NAND gates as NOTs. Then feed both into a third NAND gate, which gives A OR B, so OR needs three NAND gates.

Let us check the OR circuit with a truth table, row by row. Row one: NOT A and NOT B are both one, and one NAND one is zero. Row two: they are one and zero, and NAND gives one. Row three: zero and one, and NAND gives one. Row four: both zero, and NAND gives one. The last column is zero, one, one, one, which is exactly OR.

NOR is also universal, and the pattern is a mirror image. To make NOT, join both inputs of one NOR gate. To make OR, take A NOR B and flip it with a second NOR, so two gates. To make AND, feed NOT A and NOT B into a third NOR, so three gates.

XOR is short for exclusive OR, and it gives one when the inputs are different. Row one: both are zero, the same, so the output is zero. Row two: zero and one are different, so one. Row three: one and zero are different, so one. Row four: both are one, the same, so zero. Think of a staircase light with a switch at the top and the bottom. Flipping either switch changes the light.

XNOR is NOT XOR, so it gives one when the inputs are the same. Row one: both zero, the same, so one. Row two: different, so zero. Row three: different, so zero. Row four: both one, the same, so one. That is why XNOR is called an equality detector.

XOR can be written with basic gates. Read the first line as A AND NOT B, OR, NOT A AND B. One bracket catches A one with B zero, and the other catches A zero with B one. The second line says XNOR is simply NOT XOR. The XOR symbol is the OR shape with an extra curved line at its back.

Pause the video and try this combined circuit. The expression is Q equals A NAND B, XOR C. The inputs are A one, B one and C one. What is Q? A NAND B is zero, because both are one. Zero XOR one are different, so Q is one.

Now a combined circuit problem, solved row by row with a helper column. In row zero zero zero, NOR gives one, and one XNOR zero are different, so Q is zero. In row zero zero one, NOR is one and C is one, the same, so Q is one. In row zero one zero, B is one, so NOR gives zero, and zero XNOR zero gives one. In row zero one one, NOR is zero and C is one, so Q is zero.

Now the four rows where A is one, so NOR is always zero. In row one zero zero, zero XNOR zero gives one. In row one zero one, zero XNOR one gives zero. In row one one zero, Q is one again. In row one one one, Q is zero. Exams may ask all eight rows, so follow the same steps every time.

Use the same four steps for any combined circuit question. Write the expression by labelling each gate from inputs to output. Add one helper column in the truth table for each gate. List every input combination in binary counting order. Fill the helper columns first, and the final output last.

Let us revise what we learned today. NAND is NOT AND, and NOR is NOT OR. NAND and NOR are universal, because each can build AND, OR and NOT. From NAND, NOT needs one gate, AND needs two, and OR needs three. XOR gives one when inputs are different, and XNOR gives one when they are the same. For combined circuits, use helper columns and work row by row.